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ENTCS
2006
176views more  ENTCS 2006»
13 years 5 months ago
Automatic Formal Synthesis of Hardware from Higher Order Logic
A compiler that automatically translates recursive function definitions in higher order logic to clocked synchronous hardware is described. Compilation is by mechanised proof in t...
Mike Gordon, Juliano Iyoda, Scott Owens, Konrad Sl...
ISCAS
2003
IEEE
148views Hardware» more  ISCAS 2003»
13 years 10 months ago
Hybrid neural network architecture for age identification of ancient Kannada scripts
Wide research has been carried out and is still taking place in the field of character recognition of handwritten English characters. Recognizing English characters is much simple...
Harish K. Kashyap, Bansilal, P. Arun Koushik
HPCA
2011
IEEE
12 years 9 months ago
Dynamic parallelization of JavaScript applications using an ultra-lightweight speculation mechanism
As the web becomes the platform of choice for execution of more complex applications, a growing portion of computation is handed off by developers to the client side to reduce net...
Mojtaba Mehrara, Po-Chun Hsu, Mehrzad Samadi, Scot...
SPE
1998
129views more  SPE 1998»
13 years 5 months ago
Timing Trials, or the Trials of Timing: Experiments with Scripting and User-Interface Languages
This paper describes some basic experiments to see how fast various popular scripting and user-interface languages run on a spectrum of representative tasks. We found enormous var...
Brian W. Kernighan, Christopher J. Van Wyk
ISCAS
2008
IEEE
286views Hardware» more  ISCAS 2008»
13 years 11 months ago
A brain-machine interface using dry-contact, low-noise EEG sensors
Abstract— Electroencephalograph (EEG) recording systems offer a versatile, non-invasive window on the brain’s spatiotemporal activity for many neuroscience and clinical applica...
Thomas J. Sullivan, Stephen R. Deiss, Tzyy-Ping Ju...