172 search results - page 1 / 35 » Hardware Software Interface for Multi-Dimensional Processor ... |
ASAP
2005
IEEE
13 years 11 months ago
2005
IEEE
ARC
2008
Springer
13 years 7 months ago
2008
Springer
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
HICSS
2006
IEEE
13 years 11 months ago
2006
IEEE
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
ARCS
2008
Springer
13 years 7 months ago
2008
Springer
DSD
2011
IEEE
12 years 5 months ago
2011
IEEE
Abstract—We present a new low-level interfacing scheme for connecting custom accelerators to processors that tolerates latencies that usually occur when accessing hardware accele...