42 search results - page 3 / 9 » Heterogeneous Programmable Logic Block Architectures |
FPGA
2005
ACM
13 years 10 months ago
2005
ACM
Vdd-programmable FPGAs have been proposed recently to reduce FPGA power, where Vdd levels can be customized for different circuit elements and unused circuit elements can be powe...
ICCS
2004
Springer
13 years 10 months ago
2004
Springer
This work discusses an Evolvable Hardware (EHW) platform for the intrinsic evolution of analog electronic circuits. The EHW analog platform, named PAMA-NG (Programmable Analog Mult...
IEEEPACT
2007
IEEE
13 years 11 months ago
2007
IEEE
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
FPGA
2007
ACM
13 years 11 months ago
2007
ACM
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
FPGA
2006
ACM
13 years 9 months ago
2006
ACM
This paper examines the tradeoffs between flexibility, area, and power dissipation of programmable clock networks for FieldProgrammable Gate Arrays (FPGA's). The paper begins...