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ASPDAC
1998
ACM
86views Hardware» more  ASPDAC 1998»
13 years 9 months ago
Hierarchy - A CHDStd Tool for the Coming Deep Submicron Complex Design Crisis
Abstract -- This paper describes the use of a hierarchical design representation standard, CHDStd, as part of the architecture of the Chip Hierarchical Design System (CHDS). Detail...
S. Grout, G. Ledenbach, R. G. Bushroe, P. Fisher, ...
ISPD
1998
ACM
99views Hardware» more  ISPD 1998»
13 years 9 months ago
CHDStd - application support for reusable hierarchical interconnect timing views
This paper describes an important new facility for timing-driven design applications within the new CHDStd standard for a SEMATECH design system for large complex chips. We first ...
S. Grout, G. Ledenbach, R. G. Bushroe, P. Fisher, ...
ICCAD
2000
IEEE
88views Hardware» more  ICCAD 2000»
13 years 9 months ago
Hierarchical Interconnect Circuit Models
The increasing size of integrated systems combined with deep submicron physical modeling details creates an explosion in RLC interconnect modeling complexity of unmanageable propo...
Michael W. Beattie, Satrajit Gupta, Lawrence T. Pi...