142 search results - page 1 / 29 » High Performance Pipelined Process Migration with RDMA |
CCGRID
2011
IEEE
12 years 8 months ago
2011
IEEE
—Coordinated Checkpoint/Restart (C/R) is a widely deployed strategy to achieve fault-tolerance. However, C/R by itself is not capable enough to meet the demands of upcoming exasc...
CLUSTER
2007
IEEE
13 years 11 months ago
2007
IEEE
— One of the most useful features provided by virtual machine (VM) technologies is the ability to migrate running OS instances across distinct physical nodes. As a basis for many...
ICPPW
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper reports our experiences on the Scalable Network Of Workstation (SNOW) project, which implements a novel methodology to support user-level process migration for traditio...
PCM
2004
Springer
13 years 10 months ago
2004
Springer
This paper presents effective DSP implementation strategies for real-time JPEG2000 encoder system, an overlapped block transferring (OBT) for DWT and a pipelined processing of pas...
FCCM
2005
IEEE
13 years 10 months ago
2005
IEEE
We report test results from a prototype asynchronous FPGA (AFPGA) implemented in TSMC’s 0.18μm CMOS process. The AFPGA uses SRAM-based configuration bits with pipelined logic ...