20 search results - page 1 / 4 » High Speed FIR-Filter Architectures with Scalable Sample Rat... |
ISCAS
1993
IEEE
13 years 9 months ago
1993
IEEE
– This paper describes an efficient architecture for FIR filters. By exploiting the reduced complexity made possible by the use of sparse powers-of-two coefficients, an FIR ...
ISCAS
1994
IEEE
13 years 9 months ago
1994
IEEE
FIR ( nite impulse response) lters are widely used in digital signal processing. In this paper new architectures for high speed FIR lters with programmable coe cients are presente...
TSP
2008
13 years 5 months ago
2008
This paper presents a systematic high-speed VLSI implementation of the discrete wavelet transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D D...
INFOCOM
2003
IEEE
13 years 10 months ago
2003
IEEE
Abstract—Link bundling is a way to increase routing scalability whenever a pair of Label Switching Routers in MPLS are connected by multiple parallel links. However, link bundlin...
ERSA
2009
13 years 3 months ago
2009
Many scientific and engineering applications, which are increasingly being ported from software to reconfigurable platforms, require Gaussian-distributed random numbers. Thus, the...