154 search results - page 2 / 31 » High level cache simulation for heterogeneous multiprocessor... |
VECPAR
2000
Springer
13 years 8 months ago
2000
Springer
This paper analyzes the impact of hardware multithreading support on the performance of distributed shared-memory DSM multiprocessors built out of heterogeneous, single-chip compu...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
A generic and retargetable tool flow is presented that enables the export of timing data from software running on a cycle-accurate Virtual Prototype (VP) to a concurrent function...
MASCOTS
2001
13 years 6 months ago
2001
This paper uses trace-driven simulations to evaluate the performance of different cache management techniques for multi-level Web proxy caching hierarchies. In particular, the exp...
TPDS
2010
12 years 11 months ago
2010
The importance of transient faults is predicted to grow due to current technology trends of increased scale of integration. One of the components that will be significantly affecte...
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors in a single chip is increasing. An important issue in integrating heterogeneous ...