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» High-Level State Machine Specification and Synthesis
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ICCD
1993
IEEE
124views Hardware» more  ICCD 1993»
13 years 9 months ago
Synthesis of Controllers from Interval Temporal Logic Specification
for a state machine which is an abstraction for an existing sequential circuit, which can be useful for redesign or engineering change. The generated state machines can be further ...
Masahiro Fujita, Shinji Kono
FDL
2005
IEEE
13 years 11 months ago
Hardware Synthesis of Parallel Machines from SystemC
Heterogeneous system specifications implicitly assume parallel execution of their components that rely on supporting platform architectures and operating systems. Unfortunately, c...
Antoni Portero, Lluis Ribas, Jordi Carrabina
ICCD
1992
IEEE
84views Hardware» more  ICCD 1992»
13 years 9 months ago
Synthesis of 3D Asynchronous State Machines
We describe a new synthesis procedure for designing asynchronous controllers from burst-mode specifications, a class of specifications allowing multiple input change fundamental m...
Kenneth Y. Yun, David L. Dill, Steven M. Nowick
ITC
1999
IEEE
105views Hardware» more  ITC 1999»
13 years 9 months ago
Finite state machine synthesis with concurrent error detection
A new synthesis technique for designing finite state machines with on-line parity checking is presented. The output logic and the next-state logic of the finite state machines are...
Chaohuang Zeng, Nirmal R. Saxena, Edward J. McClus...
FASE
2003
Springer
13 years 10 months ago
Detecting Implied Scenarios Analyzing Non-local Branching Choices
Scenarios are powerful tools to model and analyze software systems. However, since they do not provide a complete description of the system, but just some possible execution paths,...
Henry Muccini