We are proposing a micro-architecture for highperformance IEEE floating-point addition that is based on a (non-redundant)high-radix representation of the floatingpoint operands....
This paper describes the application of high radix redundant CORDIC algorithms to complex logarithmic number system arithmetic. It shows that a CLNS addition can be performed with...
The IEEE Standard 754-1985 for Binary Floating-Point Arithmetic [1] was revised [2], and an important addition is the definition of decimal floating-point arithmetic. This is inte...
Marius Cornea, Cristina Anderson, John Harrison, P...
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses "flagged prefix addition" to merge rounding with the s...
Andrew Beaumont-Smith, Neil Burgess, S. Lefrere, C...
Significand pre-alignment is a pre requisite for floating point additions. This paper1 addresses the architectural design and energy delay evaluation of a Low Power Barrel Switch ...
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Kha...