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DAC
2002
ACM
14 years 5 months ago
High-Level specification and automatic generation of IP interface monitors
A central problem in functional verification is to check that a circuit block is producing correct outputs while enforcing that the environment is providing legal inputs. To attac...
Marcio T. Oliveira, Alan J. Hu
ASPDAC
2001
ACM
81views Hardware» more  ASPDAC 2001»
13 years 8 months ago
High-level specification and efficient implementation of pipelined circuits
This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modula...
Maria-Cristina V. Marinescu, Martin C. Rinard
MTV
2006
IEEE
97views Hardware» more  MTV 2006»
13 years 10 months ago
Circuit Profiling Mechanisms for High-Level {ATPG}
—Our Mutation-based Validation Paradigm (MVP) is a validation environment for high-level microprocessor implementations. To be able to efficiently generate test sequences, we nee...
Jorge Campos, Hussain Al-Asaad
FPGA
1999
ACM
174views FPGA» more  FPGA 1999»
13 years 9 months ago
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
Peter Kollig, Bashir M. Al-Hashimi
FP
1992
135views Formal Methods» more  FP 1992»
13 years 8 months ago
High Level Specification of I/O in Functional Languages
The interface with the outside world has always been one of the weakest points of functional languages. It is not easy to incorporate I/O without being allowed to do side-effects....
Peter Achten, John H. G. van Groningen, Marinus J....