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ICCAD
2004
IEEE
113views Hardware» more  ICCAD 2004»
14 years 1 months ago
High-level synthesis: an essential ingredient for designing complex ASICs
It is common wisdom that synthesizing hardware from higher-level descriptions than Verilog will incur a performance penalty. The case study here shows that this need not be the ca...
Arvind, Rishiyur S. Nikhil, Daniel L. Rosenband, N...
EVOW
2001
Springer
13 years 9 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
DAC
1998
ACM
14 years 5 months ago
A Programming Environment for the Design of Complex High Speed ASICs
A C++ based programming environment for the design of complex high speed ASICs is presented. The design of a 75 Kgate DECT transceiver is used as a driver example. Compact descrip...
Patrick Schaumont, Serge Vernalde, Luc Rijnders, M...
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
13 years 10 months ago
Heterogeneous behavioral hierarchy for system level designs
Enhancing productivity for designing complex embedded systems requires system level design methodology and language support for capturing complex design in high level models. For ...
Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Ber...
RE
1997
Springer
13 years 8 months ago
Requirements Models in Context
The field of requirements engineering emerges out of tradition of research and engineering practice that stresses rtance of generalizations and abstractions. abstraction is essent...
Colin Potts