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ICASSP
2010
IEEE
13 years 3 months ago
Bandwidth-intensive FPGA architecture for multi-dimensional DFT
Multi-dimensional (MD) Discrete Fourier Transform (DFT) is a key kernel algorithm in many signal processing algorithms, including radar data processing and medical imaging. Althou...
Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vija...
ARC
2007
Springer
169views Hardware» more  ARC 2007»
13 years 11 months ago
Designing Heterogeneous FPGAs with Multiple SBs
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...
Kostas Siozios, Stelios Mamagkakis, Dimitrios Soud...
FPGA
2004
ACM
137views FPGA» more  FPGA 2004»
13 years 10 months ago
Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources
As FPGA densities increase, partitioning-based FPGA placement approaches are becoming increasingly important as they can be used to provide high-quality and computationally scalab...
Navaratnasothie Selvakkumaran, Abhishek Ranjan, Sa...
ASAP
2004
IEEE
127views Hardware» more  ASAP 2004»
13 years 9 months ago
A Public-Key Cryptographic Processor for RSA and ECC
We describe a general-purpose processor architecture for accelerating public-key computations on server systems that demand high performance and flexibility to accommodate large n...
Hans Eberle, Nils Gura, Sheueling Chang Shantz, Vi...