2 search results - page 1 / 1 » High-performance ASIC implementations of the 128-bit block c... |
ISCAS
2008
IEEE
13 years 12 months ago
2008
IEEE
— In the present paper, we introduce high-performance hardware architectures for the 128-bit block cipher CLEFIA and evaluate their ASIC performances in comparison with the ISO/I...
DSD
2008
IEEE
14 years 1 days ago
2008
IEEE
In this paper, we examine the digital hardware design and implementation of a novel compact block cipher, referred to as PUFFIN, that is suitable for embedded applications. An imp...