21 search results - page 4 / 5 » High-performance routing at the nanometer scale |
MICRO
2009
IEEE
14 years 12 days ago
2009
IEEE
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...
CISIS
2009
IEEE
2009
IEEE
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
14 years 18 days ago
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
DATE
2006
IEEE
13 years 12 months ago
2006
IEEE
The existence of non-uniform thermal gradients on the substrate in high performance IC’s can significantly impact the performance of global on-chip interconnects. This issue is...
MSS
2007
IEEE
14 years 1 days ago
2007
IEEE
The high demand for large scale storage capacity calls for the availability of massive storage solutions with high performance interconnects. Although cluster file systems are rap...
GLOBECOM
2007
IEEE
14 years 3 days ago
2007
IEEE
— In contrast to aggregate inter-packet metrics that quantify the arrival processes of aggregate traffic at a single point in the network, intraflow end-to-end per-packet perform...