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» INTACTE: an interconnect area, delay, and energy estimation ...
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DATE
2009
IEEE
150views Hardware» more  DATE 2009»
13 years 11 months ago
A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs
—Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencie...
Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Sou...
DATE
2010
IEEE
159views Hardware» more  DATE 2010»
13 years 9 months ago
A rapid prototyping system for error-resilient multi-processor systems-on-chip
—Static and dynamic variations, which have negative impact on the reliability of microelectronic systems, increase with smaller CMOS technology. Thus, further downscaling is only...
Matthias May, Norbert Wehn, Abdelmajid Bouajila, J...