30 search results - page 2 / 6 » Impact of Load Imbalance on the Design of Software Barriers |
MICRO
1995
IEEE
13 years 8 months ago
1995
IEEE
Untolerated load instruction latencies often have a significant impact on overall program performance. As one means of mitigating this effect, we present an aggressive hardware-b...
SERP
2004
13 years 6 months ago
2004
Game and simulation development is a difficult process because there are many low level infrastructure concerns that need to be addressed. This is a barrier to development for ine...
SC
2005
ACM
13 years 10 months ago
2005
ACM
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. H...
HPCA
2005
IEEE
13 years 10 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
COMSWARE
2006
IEEE
13 years 11 months ago
2006
IEEE
Currently there are a wide variety of devices with different screen resolutions, color support, processing power, and network connectivity, capable of receiving streaming video fr...