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ISQED
2011
IEEE
398views Hardware» more  ISQED 2011»
12 years 9 months ago
Switching constraint-driven thermal and reliability analysis of Nanometer designs
As process technology continues to shrink, interconnect current densities continue to increase, making it ever more difficult to meet chip reliability targets. For microprocessors...
Srini Krishnamoorthy, Vishak Venkatraman, Yuri Apa...
ICCD
1994
IEEE
69views Hardware» more  ICCD 1994»
13 years 9 months ago
Optimal Design of Self-Damped Lossy Transmission Lines for Multichip Modules
This paper presents a simple and robust method of designing the lossy-transmission-line interconnects in a network for multichip modules. This method uses wire-sizing entirely to ...
Jimmy Shinn-Hwa Wang, Wayne Wei-Ming Dai
DAC
2004
ACM
14 years 6 months ago
STAC: statistical timing analysis with correlation
Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to model parameter varia...
Jiayong Le, Xin Li, Lawrence T. Pileggi
PDP
2005
IEEE
13 years 11 months ago
Memory Bandwidth Aware Scheduling for SMP Cluster Nodes
Clusters of SMPs are becoming increasingly common. However, the shared memory design of SMPs and the consequential contention between system processors for access to main memory c...
Evangelos Koukis, Nectarios Koziris
INTEGRATION
2008
96views more  INTEGRATION 2008»
13 years 5 months ago
Implementation of a thermal management unit for canceling temperature-dependent clock skew variations
Thermal gradients across the die are becoming increasingly prominent as we scale further down into the sub-nanometer regime. While temperature was never a primary concern, its non...
Ashutosh Chakraborty, Karthik Duraisami, Ashoka Vi...