32 search results - page 7 / 7 » Impact of Process and Temperature Variations on Network-on-C... |
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
In this paper we explore the use of a set of novel design metrics for characterizing the impact of gate oxide tunneling current in nanometer CMOS devices and perform Monte Carlo s...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
—Static and dynamic variations, which have negative impact on the reliability of microelectronic systems, increase with smaller CMOS technology. Thus, further downscaling is only...