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DAC
2010
ACM
13 years 5 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
IEEEPACT
1999
IEEE
13 years 9 months ago
On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors
The performance of applications on large shared-memory multiprocessors with coherent caches depends on the interaction between the granularity of data sharing, the size of the coh...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
TPDS
2002
75views more  TPDS 2002»
13 years 5 months ago
An Experimental Evaluation of I/O Optimizations on Different Applications
Many large scale applications have significant I/O requirements as well as computational and memory requirements. Unfortunately, the limited number of I/O nodes provided in a typic...
Meenakshi A. Kandaswamy, Mahmut T. Kandemir, Alok ...