81 search results - page 1 / 17 » Implementation and extensibility of an analytic placer |
ISPD
2004
ACM
13 years 10 months ago
2004
ACM
Automated cell placement is a critical problem in VLSI physical design. New analytical placement methods that simultaneously spread cells and optimize wirelength have recently rec...
ICCAD
2005
IEEE
14 years 2 months ago
2005
IEEE
Modern design requirements have brought additional complexities to netlists and layouts. Millions of components, whitespace resources, and fixed/movable blocks are just a few to ...
ISPD
2006
ACM
13 years 11 months ago
2006
ACM
APlace is a high quality, scalable analytical placer. This paper describes our recent efforts to improve APlace for speed and scalability. We explore various wirelength and densi...
ISQED
2007
IEEE
13 years 11 months ago
2007
IEEE
Inspired by recent success of analytical placers that use a logarithmsum-exponential (LSE) to smooth half-perimeter wirelength (HPWL), we consider in this paper two alternative sm...
ICCAD
2002
IEEE
13 years 10 months ago
2002
IEEE
IP blocks and large macro cells are increasingly prevalent in physical design, actually causing an increase in the available free space for the dust logic. We observe that top-dow...