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» Implementation of H.264 decoder on Sandblaster DSP
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ICMCS
2005
IEEE
115views Multimedia» more  ICMCS 2005»
12 years 11 months ago
Implementation of H.264 decoder on Sandblaster DSP
This paper presents the optimization techniques and results of implementing the H.264/AVC baseline profile decoder in software on the Sandblaster digital signal processor. It has ...
Vaidyanathan Ramadurai, Sanjay Jinturkar, Mayan Mo...
VLSISP
2008
123views more  VLSISP 2008»
12 years 5 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
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