164 search results - page 1 / 33 » Implementation of a SliM Array Processor |
IPPS
1996
IEEE
13 years 9 months ago
1996
IEEE
This paper presents the design and implementation of a Sliding Memory Plane (SliM) Array Processor, a mesh-connected SIMD architecture. To build the array processor, we developed ...
MTA
2008
13 years 5 months ago
2008
This paper proposes camera and media stream management techniques at the middleware level for implementing a U-City (ubiquitous city). The study focuses on overcoming the difficult...
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
— This paper describes a new architecture for a cellular processor array integrated circuit, which operates in both discreteand continuous-time domains. Asynchronous propagation ...
ISSS
2002
IEEE
13 years 10 months ago
2002
IEEE
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
IJCNN
2007
IEEE
13 years 11 months ago
2007
IEEE
- We present an application of a massively parallel processor array VLSI circuit to the implementation of neural networks in complex architectural arrangements. The work was motiva...