2 search results - page 1 / 1 » Implementation of multi-layer leaky integrator networks on a... |
IJCNN
2007
IEEE
13 years 11 months ago
2007
IEEE
- We present an application of a massively parallel processor array VLSI circuit to the implementation of neural networks in complex architectural arrangements. The work was motiva...
ISCAS
2006
IEEE
13 years 10 months ago
2006
IEEE
— This paper describes a new architecture for a cellular processor array integrated circuit, which operates in both discreteand continuous-time domains. Asynchronous propagation ...