13 search results - page 2 / 3 » Implementation of the AES-128 on Virtex-5 FPGAs |
FPGA
2009
ACM
13 years 3 months ago
2009
ACM
Multi-field packet classification is a key enabling function of a variety of network applications, such as firewall processing, Quality of Service differentiation, traffic billing...
FPL
2011
Springer
12 years 5 months ago
2011
Springer
In this paper two compact hardware structures for the computation of the CLEFIA encryption algorithm are presented. One structure based on the existing state of the art and a nove...
FCCM
2009
IEEE
14 years 5 days ago
2009
IEEE
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
FPGA
2010
ACM
14 years 2 months ago
2010
ACM
Electronic systems increasingly suffer from component variation, thermal hotspots, uneven wearout, and other subtle physical phenomena. Systems based on FPGAs have unique opportun...
RECONFIG
2009
IEEE
14 years 5 days ago
2009
IEEE
Abstract—Integrated circuits for very high-speed telecommunication protocols often use ASICs, due to their strict timing constraints. This scenario is changing, since modern FPGA...