12 search results - page 2 / 3 » Implementing asynchronous circuits using a conventional EDA ... |
FPGA
2007
ACM
13 years 11 months ago
2007
ACM
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
ACSD
2005
IEEE
13 years 11 months ago
2005
IEEE
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
DATE
2009
IEEE
13 years 9 months ago
2009
IEEE
The inherent reconfigurability of SRAM-based FPGAs enables the use of configurations optimized for the problem at hand. Optimized configurations are smaller and faster than their g...
EUSFLAT
2003
13 years 6 months ago
2003
Industrial processes can be often modelled using Petri nets. If all the process variables (or events) are assumed to be twovalued signals, then it is possible to obtain a hardware...
ASYNC
2000
IEEE
13 years 9 months ago
2000
IEEE
New design technologies rely on truly reusable IP blocks with simple means of assembly. Asynchronous methodologies could be a promising option to implement these requirements. Pro...