20 search results - page 2 / 4 » Implementing sparse matrix-vector multiplication on throughp... |
FCCM
2007
IEEE
13 years 7 months ago
2007
IEEE
Creating a high throughput sparse matrix vector multiplication (SpMxV) implementation depends on a balanced system design. In this paper, we introduce the innovative SpMxV Solver ...
ICASSP
2011
IEEE
12 years 9 months ago
2011
IEEE
This paper presents a unified model for image editing in terms of Sparse Matrix-Vector (SpMV) multiplication. In our framework, we cast image editing as a linear energy minimizat...
FCCM
2006
IEEE
13 years 11 months ago
2006
IEEE
We present an architecture and an implementation of an FPGA-based sparse matrix-vector multiplier (SMVM) for use in the iterative solution of large, sparse systems of equations ar...
CAP
2010
13 years 6 days ago
2010
The multiplication of the sparse multivariate polynomials using the recursive representations is revisited to take advantage on the multicore processors. We take care of the memor...
FPGA
2005
ACM
13 years 10 months ago
2005
ACM
Large, high density FPGAs with high local distributed memory bandwidth surpass the peak floating-point performance of high-end, general-purpose processors. Microprocessors do not...