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ECOOP
2008
Springer
13 years 7 months ago
Online Phase-Adaptive Data Layout Selection
Good data layouts improve cache and TLB performance of object-oriented software, but unfortunately, selecting an optimal data layout a priori is NP-hard. This paper introduces layo...
Chengliang Zhang, Martin Hirzel
HCI
2009
13 years 3 months ago
Sphere Anchored Map: A Visualization Technique for Bipartite Graphs in 3D
Circular anchored maps have been proposed as a drawing technique to acquire knowledge from bipartite graphs, where nodes in one set are arranged on a circumference. However, the re...
Takao Ito, Kazuo Misue, Jiro Tanaka
GLVLSI
2003
IEEE
173views VLSI» more  GLVLSI 2003»
13 years 11 months ago
40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
Michael I. Fuller, James P. Mabry, John A. Hossack...
VLSID
2002
IEEE
96views VLSI» more  VLSID 2002»
13 years 11 months ago
Strategies for Improving Data Locality in Embedded Applications
This paper introduces a dynamic layout optimization strategy to minimize the number of cycles spent in memory accesses in a cache-based memory environment. In this approach, a giv...
N. E. Crosbie, Mahmut T. Kandemir, Ibrahim Kolcu, ...
IPPS
1999
IEEE
13 years 10 months ago
A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...