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SIAMCOMP
2002
73views more  SIAMCOMP 2002»
13 years 5 months ago
Improved Approximations of Crossings in Graph Drawings and VLSI Layout Areas
Guy Even, Sudipto Guha, Baruch Schieber
GD
2008
Springer
13 years 6 months ago
Topology Preserving Constrained Graph Layout
Abstract. Constrained graph layout is a recent generalisation of forcedirected graph layout which allows constraints on node placement. We give a constrained graph layout algorithm...
Tim Dwyer, Kim Marriott, Michael Wybrow
TCAD
2010
88views more  TCAD 2010»
13 years 15 days ago
Stress Aware Layout Optimization Leveraging Active Area Dependent Mobility Enhancement
Starting from the 90nm technology node, process induced stress has played a key role in the design of highperformance devices. The emergence of source/drain silicon germanium (S/D ...
Ashutosh Chakraborty, Sean X. Shi, David Z. Pan
ICDAR
2011
IEEE
12 years 5 months ago
Extending Page Segmentation Algorithms for Mixed-Layout Document Processing
—The goal of this work is to add the capability to segment documents containing text, graphics, and pictures in the open source OCR engine OCRopus. To achieve this goal, OCRopusâ...
Amy Winder, Tim L. Andersen, Elisa H. Barney Smith
TPDS
2002
94views more  TPDS 2002»
13 years 5 months ago
Recursive Array Layouts and Fast Matrix Multiplication
The performance of both serial and parallel implementations of matrix multiplication is highly sensitive to memory system behavior. False sharing and cache conflicts cause traditi...
Siddhartha Chatterjee, Alvin R. Lebeck, Praveen K....