100 search results - page 2 / 20 » Improved Policies for Drowsy Caches in Embedded Processors |
MICRO
2002
IEEE
13 years 4 months ago
2002
IEEE
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potentia...
EUC
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. Power consumption is becoming one of the most important constraints for microprocessor design in nanometer-scale technologies. Especially, as the transistor supply voltag...
DSD
2008
IEEE
13 years 6 months ago
2008
IEEE
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay techniques. We discovered that a filter cache, traditionally used for reducing...
ISSS
1996
IEEE
13 years 9 months ago
1996
IEEE
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
IPCCC
2006
IEEE
13 years 11 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...