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DATE
2006
IEEE
93views Hardware» more  DATE 2006»
13 years 11 months ago
Restructuring field layouts for embedded memory systems
In many computer systems with large data computations, the delay of memory access is one of the major performance bottlenecks. In this paper, we propose an enhanced field remappi...
Keoncheol Shin, Jungeun Kim, Seonggun Kim, Hwansoo...
DATE
2004
IEEE
177views Hardware» more  DATE 2004»
13 years 8 months ago
Adaptive Prefetching for Multimedia Applications in Embedded Systems
This paper presents a new and simple prefetching mechanism to improve the memory performance of multimedia applications. This method adapts the memory access mechanism to the acce...
Hassan Sbeyti, Smaïl Niar, Lieven Eeckhout
ICS
1999
Tsinghua U.
13 years 9 months ago
Reducing cache misses using hardware and software page placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Timothy Sherwood, Brad Calder, Joel S. Emer
ICCD
2006
IEEE
189views Hardware» more  ICCD 2006»
14 years 1 months ago
A Capacity Co-allocation Configurable Cache for Low Power Embedded Systems
— Traditional level-one instruction caches and data caches for embedded systems typically have the same capacities. Configurable caches either shut down a part of the cache to su...
Chuanjun Zhang
DAC
2008
ACM
14 years 5 months ago
Latency and bandwidth efficient communication through system customization for embedded multiprocessors
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
Chenjie Yu, Peter Petrov