24 search results - page 4 / 5 » Improvements for the Symbolic Verification of Timed Automata |
FDL
2007
IEEE
13 years 10 months ago
2007
IEEE
Abstract-- Analog and Mixed Signal (AMS) designs are important integrated systems that link digital circuits to the analog world. Following the success of PSL verification methodol...
CONIELECOMP
2005
IEEE
13 years 12 months ago
2005
IEEE
The approximate searching problem on compressed text tries to find all the matches of a pattern in a compressed text, without decompressing it and considering that the match of th...
DAC
2004
ACM
14 years 7 months ago
2004
ACM
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
PTS
2008
13 years 7 months ago
2008
The state space explosion due to concurrency and timing constraints of concurrent real-time systems (CRTS) presents significant challenges to the verification engineers. In this pa...
ASE
2005
13 years 6 months ago
2005
Techniques for efficiently evaluating future time Linear Temporal Logic (abbreviated LTL) formulae on finite execution traces are presented. While the standard models of LTL are i...