4 search results - page 1 / 1 » Improving I O performance using soft-QoS-based dynamic stora... |
CLUSTER
2009
IEEE
13 years 11 months ago
2009
IEEE
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
ISCA
2000
IEEE
13 years 8 months ago
2000
IEEE
High performance general-purpose processors are increasingly being used for a variety of application domains scienti c, engineering, databases, and more recently, media processing...
ASPLOS
2009
ACM
14 years 5 months ago
2009
ACM
Miss rate curves (MRCs) are useful in a number of contexts. In our research, online L2 cache MRCs enable us to dynamically identify optimal cache sizes when cache-partitioning a s...