62 search results - page 1 / 13 » Improving Multiprocessor Performance with Coarse-Grain Coher... |
ISCA
2005
IEEE
13 years 11 months ago
2005
IEEE
To maintain coherence in conventional shared-memory multiprocessor systems, processors first check other processors’ caches before obtaining data from memory. This coherence che...
MICRO
2007
IEEE
13 years 11 months ago
2007
IEEE
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed techniques for coherence traffic reduct...
HPCA
1999
IEEE
13 years 9 months ago
1999
IEEE
Symmetric multiprocessors (SMPs) connected with low-latency networks provide attractive building blocks for software distributed shared memory systems. Two distinct approaches hav...
CAL
2007
13 years 5 months ago
2007
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed memory hierarchy enhancements for coher...
ASAP
2005
IEEE
13 years 11 months ago
2005
IEEE
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...