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PPOPP
2009
ACM
14 years 5 months ago
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
Muthu Manikandan Baskaran, Nagavijayalakshmi Vydya...
SPAA
2012
ACM
11 years 7 months ago
A scalable framework for heterogeneous GPU-based clusters
GPU-based heterogeneous clusters continue to draw attention from vendors and HPC users due to their high energy efficiency and much improved single-node computational performance...
Fengguang Song, Jack Dongarra
ICRA
2000
IEEE
93views Robotics» more  ICRA 2000»
13 years 9 months ago
Scheduling and Coordination in Manufacturing Enterprise Automation
Manufacturing enterprise automation was focused on factory level where scheduling is a key issue in the past. As more and more companies are relying on their business parmers or s...
Haoxun Chen, Peter B. Luh
ISCA
2002
IEEE
108views Hardware» more  ISCA 2002»
13 years 10 months ago
A Scalable Instruction Queue Design Using Dependence Chains
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...
Steven E. Raasch, Nathan L. Binkert, Steven K. Rei...
HPCA
2006
IEEE
14 years 5 months ago
Efficient instruction schedulers for SMT processors
We propose dynamic scheduler designs to improve the scheduler scalability and reduce its complexity in the SMT processors. Our first design is an adaptation of the recently propos...
Joseph J. Sharkey, Dmitry V. Ponomarev