15 search results - page 2 / 3 » Improving a Fault-Tolerant Routing Algorithm Using Detailed ... |
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
NOMS
2008
IEEE
13 years 12 months ago
2008
IEEE
Abstract—Peer-to-peer (P2P) systems show numerous advantages over centralized systems, such as load balancing, scalability, and fault tolerance, and they require certain function...
SPAA
1996
ACM
13 years 9 months ago
1996
ACM
Several recent papers have proposed or analyzed optimal algorithms to route all-to-all personalizedcommunication (AAPC) over communication networks such as meshes, hypercubes and ...
GECCO
2008
Springer
13 years 6 months ago
2008
Springer
Evolutionary testing denotes the use of evolutionary algorithms, e.g., Genetic Algorithms (GAs), to support various test automation tasks. Since evolutionary algorithms are heuris...
MICRO
2010
IEEE
13 years 3 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...