1001 search results - page 2 / 201 » Improving memory hierarchy performance for irregular applica... |
MICRO
2000
IEEE
13 years 8 months ago
2000
IEEE
Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper, we propose a cache and TLB layout and design that...
ISCA
2011
IEEE
12 years 8 months ago
2011
IEEE
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
ACMMSP
2004
ACM
13 years 10 months ago
2004
ACM
Irregular applications frequently exhibit poor performance on contemporary computer architectures, in large part because of their inefficient use of the memory hierarchy. Runtime ...
CONCURRENCY
2007
13 years 4 months ago
2007
Abstract. The memory hierarchy plays an essential role in the performance of current computers, thus good analysis tools that help predict and understand its behavior are required....
DAC
2006
ACM
14 years 5 months ago
2006
ACM
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...