148 search results - page 3 / 30 » Improving simulation-based verification by means of formal m... |
ESWS
2010
Springer
13 years 3 months ago
2010
Springer
Recent work in Ontology learning and Text mining has mainly focused on engineering methods to solve practical problem. In this thesis, we investigate methods that can substantially...
JISE
1998
13 years 5 months ago
1998
straction reduces the number of states necessary to perform formal verification while maintaining the functionality of the original model with respect to ifications to be verified....
ISQED
2007
IEEE
13 years 11 months ago
2007
IEEE
We propose gate level statistical simulation to bridge the gap between the most accurate Monte Carlo SPICE simulation and the most efficient circuit level statistical static timi...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
C++ based verification methodologies are now emerging as the preferred method for SOC design. However most of the verification involving the C++ models are simulation based. The c...
TII
2008
13 years 5 months ago
2008
Abstract--Safety analysis in Systems Engineering (SE) processes, as usually implemented, rarely relies on formal methods such as model checking since such techniques, however power...