70 search results - page 1 / 14 » Improving the Accuracy and Performance of Memory Communicati... |
MICRO
1997
IEEE
13 years 9 months ago
1997
IEEE
As processors continue to exploit more instruction level parallelism, a greater demand is placed on reducing the e ects of memory access latency. In this paper, we introduce a nov...
ISCA
2003
IEEE
13 years 10 months ago
2003
IEEE
Despite their superior performance for multimedia applications, vector processors have three limitations that hinder their widespread acceptance. First, the complexity and size of...
JILP
2000
13 years 4 months ago
2000
Load latency remains a signi cant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Predi...
EUROPAR
2001
Springer
13 years 9 months ago
2001
Springer
High-accuracy PDE solvers use multi-dimensional fast Fourier transforms. The FFTs exhibits a static and structured memory access pattern which results in a large amount of communic...
SC
2004
ACM
13 years 10 months ago
2004
ACM
Improving program locality has become increasingly important on modern computer systems. An effective strategy is to group computations on the same data so that once the data are ...