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PATMOS
2005
Springer
13 years 10 months ago
Improving the Memory Bandwidth Utilization Using Loop Transformations
Abstract. Embedded devices designed for various real-time multimedia and telecom applications, have a bottleneck in energy consumption and performance that becomes day by day more ...
Minas Dasygenis, Erik Brockmeyer, Francky Catthoor...
FPGA
2012
ACM
285views FPGA» more  FPGA 2012»
12 years 7 days ago
Optimizing SDRAM bandwidth for custom FPGA loop accelerators
Memory bandwidth is critical to achieving high performance in many FPGA applications. The bandwidth of SDRAM memories is, however, highly dependent upon the order in which address...
Samuel Bayliss, George A. Constantinides
TVLSI
2002
94views more  TVLSI 2002»
13 years 4 months ago
A network flow approach to memory bandwidth utilization in embedded DSP core processors
This paper presents a network flow approach to solving the register binding and allocation problem for multiword memory access DSP processors. In recently announced DSP processors,...
Catherine H. Gebotys
CODES
2004
IEEE
13 years 8 months ago
Optimizing the memory bandwidth with loop fusion
The memory bandwidth largely determines the performance and energy cost of embedded systems. At the compiler level, several techniques improve the memory bandwidth at the scope of...
Paul Marchal, José Ignacio Gómez, Fr...
IPPS
1999
IEEE
13 years 8 months ago
A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...