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» Incremental Compilation for Logic Emulation
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POPL
2004
ACM
14 years 5 months ago
Incremental execution of transformation specifications
We aim to specify program transformations in a declarative style, and then to generate executable program transformers from such specifications. Many transformations require non-t...
Ganesh Sittampalam, Oege de Moor, Ken Friis Larsen
ASM
2008
ASM
13 years 7 months ago
Using EventB to Create a Virtual Machine Instruction Set Architecture
A Virtual Machine (VM) is a program running on a conventional microprocessor that emulates the binary instruction set, registers, and memory space of an idealized computing machine...
Stephen Wright
DATE
2008
IEEE
157views Hardware» more  DATE 2008»
13 years 11 months ago
Logical Reliability of Interacting Real-Time Tasks
We propose the notion of logical reliability for real-time program tasks that interact through periodically updated program variables. We describe a reliability analysis that chec...
Krishnendu Chatterjee, Arkadeb Ghosal, Thomas A. H...
FPGA
1998
ACM
132views FPGA» more  FPGA 1998»
13 years 9 months ago
Circuit Partitioning with Complex Resource Constraints in FPGAs
In this paper, we present an algorithm for circuit partitioning with complex resource constraints in large FPGAs. Traditional partitioning methods estimate the capacity of an FPGA...
Huiqun Liu, Kai Zhu, D. F. Wong
JAR
2008
89views more  JAR 2008»
13 years 5 months ago
An Extensible Encoding of Object-oriented Data Models in hol
Abstract We present an extensible encoding of object-oriented data models into higherorder logic (HOL). Our encoding is supported by a datatype package that leverages the use of th...
Achim D. Brucker, Burkhart Wolff