An incremental simulation-based approach to fault diagnosis and logic debugging is presented. During each iteration of the algorithm, a single suspicious location is identified a...
Andreas G. Veneris, Jiang Brandon Liu, Mandana Ami...
This paper describes an approach to design error diagnosis and correction in combinational digital circuits. Our approach targets small errors introduced during the design process...
We develop a microprocessor design that tolerates hard faults, including fabrication defects and in-field faults, by leveraging existing microprocessor redundancy. To do this, we...
Abstract: A probabilistic event-driven fault localization technique is presented, which uses a symptom-fault map as a fault propagation model. The technique isolates the most proba...
This paper presents a probabilistic event-driven fault localization technique, which uses a probabilistic symptomfault map as a fault propagation model. The technique isolates the...