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TVLSI
2002
130views more  TVLSI 2002»
13 years 5 months ago
Incremental compilation for parallel logic verification systems
Although simulation remains an important part of application-specific integrated circuit (ASIC) validation, hardware-assisted parallel verification is becoming a larger part of the...
R. Tessier, S. Jana
RSP
1999
IEEE
122views Control Systems» more  RSP 1999»
13 years 10 months ago
Incremental Compilation for Logic Emulation
Over the past decade, the steady growth rate of FPGA device capacities has enabled the development of multi-FPGA prototyping environments capable of implementing millions of logic...
Russell Tessier
TCAD
2002
146views more  TCAD 2002»
13 years 5 months ago
Static scheduling of multidomain circuits for fast functional verification
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
Murali Kudlugi, Russell Tessier
ICFP
2008
ACM
14 years 5 months ago
A type-preserving compiler in Haskell
There has been a lot of interest of late for programming languages that incorporate features from dependent type systems and proof assistants in order to capture in the types impo...
Louis-Julien Guillemette, Stefan Monnier
ECAI
2010
Springer
13 years 7 months ago
Parallel Model Checking for Temporal Epistemic Logic
Abstract. We investigate the problem of the verification of multiagent systems by means of parallel algorithms. We present algorithms for CTLK, a logic combining branching time tem...
Marta Z. Kwiatkowska, Alessio Lomuscio, Hongyang Q...