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INTEGRATION
2007
95views more  INTEGRATION 2007»
13 years 5 months ago
Wire shaping of RLC interconnects
The optimum wire shape to produce the minimum signal propagation delay across an RLC line is shown to exhibit a general exponential form. The line inductance makes exponential tap...
Magdy A. El-Moursy, Eby G. Friedman
HPCA
2005
IEEE
13 years 11 months ago
Exploring the Design Space of Power-Aware Opto-Electronic Networked Systems
As microprocessors become increasingly interconnected, the power consumed by the interconnection network can no longer be ignored. Moreover, with demand for link bandwidth increas...
Xuning Chen, Li-Shiuan Peh, Gu-Yeon Wei, Yue-Kai H...
JSA
2006
113views more  JSA 2006»
13 years 5 months ago
A power-efficient TCAM architecture for network forwarding tables
Stringent memory access and search speed requirements are two of the main bottlenecks in wire speed processing. Most viable search engines are implemented in content addressable m...
Taskin Koçak, Faysal Basci
DELTA
2006
IEEE
13 years 11 months ago
Minimizing Simultaneous Switching Noise (SSN) using Modified Odd/Even Bus Invert Method
In high speed digital circuits, the inductive effect is more dominant compared to capacitive effect. In particular, as the technology is shrinking, the spacing between interconnec...
K. S. Sainarayanan, J. V. R. Ravindra, M. B. Srini...
GLVLSI
2009
IEEE
123views VLSI» more  GLVLSI 2009»
14 years 10 days ago
Power efficient tree-based crosslinks for skew reduction
Clock distribution networks are an important design issue that is highly dependent on delay variations and load imbalances, while requiring power efficiency. Existing mesh solutio...
Inna Vaisband, Ran Ginosar, Avinoam Kolodny, Eby G...