386 search results - page 1 / 78 » Informing Memory Operations: Providing Memory Performance Fe... |
ISCA
1996
IEEE
13 years 9 months ago
1996
IEEE
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
DAMON
2009
Springer
13 years 6 months ago
2009
Springer
This paper presents novel tree-based search algorithms that exploit the SIMD instructions found in virtually all modern processors. The algorithms are a natural extension of binar...
TOCS
1998
13 years 4 months ago
1998
DSN
2004
IEEE
13 years 8 months ago
2004
IEEE
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
VLDB
1999
ACM
13 years 9 months ago
1999
ACM
Recent high-performance processors employ sophisticated techniques to overlap and simultaneously execute multiple computation and memory operations. Intuitively, these techniques ...