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» Initialization of Sequential Circuits and its Application to...
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ATS
1997
IEEE
87views Hardware» more  ATS 1997»
13 years 9 months ago
A Genetic Algorithm for the Computation of Initialization Sequences for Synchronous Sequential Circuits
Testing circuits which do not include a global reset signal requires either complex ATPG algorithms based on 9- or even 256-valued algebras, or some suitable method to generate in...
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
13 years 9 months ago
FreezeFrame: Compact Test Generation Using a Frozen Clock Strategy
Test application time is an important factor in the overall cost of VLSI chip testing. We present a new ATPG approach for generating compact test sequences for sequential circuits...
Yanti Santoso, Matthew C. Merten, Elizabeth M. Rud...
TCAD
1998
110views more  TCAD 1998»
13 years 4 months ago
Application of genetically engineered finite-state-machine sequences to sequential circuit ATPG
—New methods for fault-effect propagation and state justification that use finite-state-machine sequences are proposed for sequential circuit test generation. Distinguishing se...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
ISCAS
2007
IEEE
128views Hardware» more  ISCAS 2007»
13 years 11 months ago
SAT-based ATPG for Path Delay Faults in Sequential Circuits
Due to the development of high speed circuits beyond the 2-GHz mark, the significance of automatic test pattern generation for Path Delay Faults (PDFs) drastically increased in t...
Stephan Eggersglüß, Görschwin Fey,...