15 search results - page 2 / 3 » Input Ordering in Concurrent Checkers to Reduce Power Consum... |
DATE
2008
IEEE
14 years 2 days ago
2008
IEEE
In this paper, we present a novel simulation approach for power grid network analysis. The new approach, called ETBR for extended truncated balanced realization, is based on model...
ICPP
2007
IEEE
13 years 12 months ago
2007
IEEE
As the number of computing and storage nodes keeps increasing, the interconnection network is becoming a key element of many computing and communication systems, where the overall...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
ECRTS
2008
IEEE
14 years 2 days ago
2008
IEEE
Embedded services and applications that interact with the real world often, over time, need to run on different kinds of hardware (low-cost microcontrollers to powerful multicore ...
CHES
2000
Springer
13 years 9 months ago
2000
Springer
Abstract. Since the announcement of the Differential Power Analysis (DPA) by Paul Kocher and al., several countermeasures were proposed in order to protect software implementations...