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» Instruction Cache Fetch Policies for Speculative Execution
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2007
Tsinghua U.
13 years 11 months ago
An L2-miss-driven early register deallocation for SMT processors
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
Joseph J. Sharkey, Dmitry V. Ponomarev
ECOOP
1995
Springer
13 years 8 months ago
Do Object-Oriented Languages Need Special Hardware Support?
Previous studies have shown that object-oriented programs have different execution characteristics than procedural programs, and that special object-oriented hardware can improve p...
Urs Hölzle, David Ungar
MICRO
1997
IEEE
116views Hardware» more  MICRO 1997»
13 years 9 months ago
Tuning Compiler Optimizations for Simultaneous Multithreading
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay ...
ISPASS
2005
IEEE
13 years 11 months ago
Partitioning Multi-Threaded Processors with a Large Number of Threads
Today’s general-purpose processors are increasingly using multithreading in order to better leverage the additional on-chip real estate available with each technology generation...
Ali El-Moursy, Rajeev Garg, David H. Albonesi, San...
IEEEPACT
2003
IEEE
13 years 10 months ago
The Impact of Resource Partitioning on SMT Processors
Simultaneous multithreading (SMT) increases processor throughput by multiplexing resources among several threads. Despite the commercial availability of SMT processors, several as...
Steven E. Raasch, Steven K. Reinhardt