78 search results - page 2 / 16 » Instruction Cache Fetch Policies for Speculative Execution |
LCTRTS
2007
Springer
13 years 11 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
TC
2002
13 years 4 months ago
2002
Value prediction is a technique that breaks true data dependences by predicting the outcome of an instruction and speculatively executes its data-dependent instructions based on th...
IPCCC
1999
IEEE
13 years 9 months ago
1999
IEEE
Performance evaluation of modern, highly speculative, out-of-order microprocessors and the corresponding production of detailed, valid, accurate results have become serious challe...
HPCA
2008
IEEE
14 years 5 months ago
2008
IEEE
Simultaneous Multithreading (SMT) attempts to keep a dynamically scheduled processor's resources busy with work from multiple independent threads. Threads with longlatency st...
MICRO
2002
IEEE
13 years 9 months ago
2002
IEEE
In this paper we present an approach to boosting performance and tolerating latency by deferring non-critical instructions into a deferred queue for later processing. As such, ins...