1192 search results - page 2 / 239 » Instruction Level Distributed Processing |
MICRO
1993
IEEE
13 years 9 months ago
1993
IEEE
Extensive research has been done on extracting parallelism from single instruction stream processors. This paper presents some results of our investigation into ways to modify MIM...
IEEEPACT
2000
IEEE
13 years 10 months ago
2000
IEEE
Multimedia instruction set extensions have become a prominent feature in desktop microprocessor platforms, promising superior performance on a wide range of floating-point and int...
CJ
2006
13 years 5 months ago
2006
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
ICPP
1999
IEEE
13 years 9 months ago
1999
IEEE
Trace-level reuse is based on the observation that some traces (dynamic sequences of instructions) are frequently repeated during the execution of a program, and in many cases, th...
HPCA
1999
IEEE
13 years 9 months ago
1999
IEEE
