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DSD
2009
IEEE
90views Hardware» more  DSD 2009»
13 years 11 months ago
Instruction Precomputation for Fault Detection
—Fault tolerance (FT) is becoming increasingly important in computing systems. This work proposes and evaluates the instruction precomputation technique to detect hardware faults...
Demid Borodin, Ben H. H. Juurlink, Stefanos Kaxira...
DATE
2010
IEEE
111views Hardware» more  DATE 2010»
13 years 9 months ago
Instruction precomputation with memoization for fault detection
—Fault tolerance (FT) has become a major concern in computing systems. Instruction duplication has been proposed to verify application execution at run time. Two techniques, inst...
Demid Borodin, Ben H. H. Juurlink
ASPLOS
2006
ACM
13 years 10 months ago
Understanding prediction-based partial redundant threading for low-overhead, high- coverage fault tolerance
Redundant threading architectures duplicate all instructions to detect and possibly recover from transient faults. Several lighter weight Partial Redundant Threading (PRT) archite...
Vimal K. Reddy, Eric Rotenberg, Sailashri Parthasa...
IEEEPACT
2007
IEEE
13 years 11 months ago
Error Detection Using Dynamic Dataflow Verification
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
Albert Meixner, Daniel J. Sorin
IEEEPACT
2006
IEEE
13 years 10 months ago
Self-checking instructions: reducing instruction redundancy for concurrent error detection
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
Sumeet Kumar, Aneesh Aggarwal